Please enable JavaScript to view this site.

Application Gallery

Navigation: » No topics above this level «

Cadence Interoperability - Verilog-A PAM4 transceiver

Scroll Prev Top Next More

cover_picture_cadence_interop_verilog-a_pam4_zoom33In this example, we simulate a pulse-amplitude modulation-4 (PAM4) transceiver in Cadence Virtuoso using photonic Verilog-A models. This example is similar to the example in the previous page, and the difference is that the optical models used in this example are built based on Verilog-A technique instead of compact models. For this time domain simulation, the spectrum response and the eye diagram results are studied.
Cadence interop installation instructions and resources

Files and Required Products




Photonic Verilog-A Platform


Minimum product version: 2020a r1



Run and results

Important model settings

Updating the model with your parameters

Additional resources


Understand the simulation workflow and key results


We are simulating a PAM4 transceiver with the Verilog-A models. The models will be simulated in Spectre but to represent their optical behaviors based on Verilog-A method.


The circuit is a PAM4 transceiver, composed of a continuous-wave laser, an optical ring modulator, a grating coupler, a couple of optical waveguides, a photodetector and an electrical circuit for the modulator driving signals.  


Note: The Verilog-A models are provided in the libraries pam4_va_example_lib and pam4_va_example_primitive_lib. These libraries include the model symbols and CDF setup. Please refer to Step 3 and 4 of the Verilog-A CML Simulation in Cadence Virtuoso manual for more details on how to build and use the Verilog-A models.

Step 1: Set up library reference  

The Verilog-A libraries and built-in libraries are added to the Library Path in the Library Manager.

Step 2: Schematic design

The circuit schematic is designed in Cadence Virtuoso using the Verilog-A model libraries mentioned above. The analogLib, basic and opticalLib libraries which are shipped with Cadence Virtuoso are also needed.

Step 3: Configure ADE L

We define the Design variables, monitored output ports and analyses arguments in the Analog Design Environment (ADE) L window.

Step 4: Netlist and run simulation

We then can generate the netlist and run the simulation.

Step 5: Display results

The transmission waveform and the eye diagram of the PAM4 received signal will be retrieved in the Results window with direct plotting at the end. The spectrum response will also be generated.


Run and results

Instructions for running the model and discussion of key results


Step 1: Load libraries and schematic design

1.Launch Virtuoso

2.Open the Virtuoso Library Mananger (…/Tools/Library Manager).

3.Add the “pam4_va_example”, "pam4_va_example_lib", "pam4_va_example_primitive_lib", "basic" , "opticalLib" and "analogLib" libraries to the Library list (Edit/Library Path). The “basic” and "opticalLib", and “analogLib” libraries can be found in:

<virtuoso installation directoru>/tools.lnx86/dfII/etc/cdslib


<virtuoso installation directoru>/tools.lnx86/dfII/etc/cdslib/artist

, respectively.

The “pam4_va_example”, "pam4_va_example_lib" and "pam4_va_example_primitive_lib" are available for download in this app gallery example.

4.In the “pam4_va_example” library and “TestBench” cell, double click on the “schematic” view to visualize the schematic design.


The Library Manager should configure as below:



This example is a PAM4 transceiver with the following schematic design:



where the PAM4_transceiver component can be expanded to the following:


Step 2: Configure ADE L

1. Double click on the “spectre_state_setup” to open up the ADE L configuration session.

2. Open the Model Library Setup window by going to Setup/Model Libraries. Use the file browser to select and add the "includeModels_2channel.scs" and "includeElements.scs" global model files. The files can be found in the "model" folder and the "veriloga" folder, respectively.


The ADE L session should configure as below:



The Model Libraries window should configure as below:



Step 3: Netlist and run

1.Generate the netlists by Simulation/Netlist/Create.

2.Click the run button. The running status will be updated in the pop-up psf window.

3.View the result by going to Result/Direct plot/Transient signal, then select the "voutn" result in the pop-up schematic and right click to slect Plot Voltage/Transient.

4.In the Visualization window for the transient plot, plot the eye diagram by going to Measurements/Eye Diagram with the settings shown below.


The eye diagram settings is shown below:



The eye diagram result will be generated with the above settings. The eye diagram resulting from the time domain simulation is quite open and the 4-level signal can be clearly seen.



5.Open the "schematic" view. In the "Edit" select "Ignore Instances" and click on the PRBS generators to ignore them for the spectrum measurement simulation. Check and Save the schematic.

6.In ADE L configuration session, open the Analyses argument "tran". Enable the "Dynamic Parameter" option.

7.In ADE L configuration session, enable "save" and "plot" for "Voutn vs Wavelength1" and disable them for "Voutn".

8.Run the simulation and "Voutn vs Wavelength1" plot will pop out.



The "Dynamic Parameter" is configured as below. The table is populated with 1000 points of time (ranging from 0 to 5ns) vs wavelength1(ranging from 1.55um to 1.552um). These values can be imported from a .CSV file.



The calculated spectrum is shown below. The transmission peak of the ring modulator is at 1550.9 nm.



Important model settings

Description of important objects and settings used in this model

Model reference library

The Model reference libraries are defined in Step 2 of the above section. Note that we choose 2-channel models since the top-level model reference files were constructed for two channels for this application example. A foundry may choose to construct their models for up to eight channels.

Updating the model with your parameters

Instructions for updating the model based on your device parameters


Electrical circuit design

The electrical circuit is defined by Verilog A models in this example. Users can update the electrical circuit with CML models.

Optical circuit design

User can update the time domain simulation with the following parameters:

Set the wavelength of interest in the Laser Source.

Set the bit rate.

Additional resources

Additional documentation, examples and training material

Virtuoso ADE interoperability

EPDA version requirements and documentation

Cadence-Lumerical EPDA installation manual
Install process design kit (PDK) for EPDA flow
EPDA element mapping rules
EPDA PDK verification

Cadence Interoperability - ONA and OTRAN


Related Lumerical University courses:

Course_INT100 Course_SCRIPTING_v1

Copyright Lumerical Inc. | Privacy | Site Map