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The project file used in this example is provided in the top-level page.  Alternatively, the file can be created from scratch by following the steps described in the Modeling Instructions page.  Once the simulation has been set up, it will look as in this screenshot (in the XZ-plane).

 

XZ plane view of the simulation setup

XZ plane view of the simulation setup

 

There are three rectangles in the Objects Tree.  The silicon substrate and the aluminum emitter and base.  The silicon substrate is divided into two doped regions of p-type and n-type using the (green) constant doping boxes.  The constant doping regions are defined by the dopant type (n- or p-type) and dopant concentration.  The emitter and base contacts are located at the two ends of the substrate. The contacts can be associated with a range of voltage values that the simulation will sweep over to generate current-voltage plots by defining boundary conditions from the Boundary Conditions table.

 

In the graphical user interface (CAD), orange lines show the CHARGE simulation region. When using automatic meshing, the mesh size is based on (in order applied):

Global constraints on edge length (min and max), which are specified by the user, and not auto-updated based on the simulation

A global quality constraint, which specifies the minimum angle allowed in any triangle

The distribution of dopants.

 

Note:  Accurate modeling of small geometric or electrostatic features, particularly at abrupt junctions, may require a finer mesh than is created by the automatic mesh algorithm. In these cases, a mesh constraint region can be used, as in this example, to manually define a finer mesh where it is needed.

 

The simulation region is set up to include the substrate, anode and cathode in the XZ plane.  Since this structure has no variations in the y direction, a 1D simulation in the Z direction would also yield the same results.  The simulation region is set up for T=300 K. This temperature can be modified to model the device operation at any other temperatures.

 

Run Simulation

Under File tab and Configure section, press the Resources button icon_resources_new .  Then, press the "Run Tests" button to make sure the simulation engine is configured correctly.  The first time you run this test, it may fail and ask you to register your username and password for your operating system account. If it does, fill in the appropriate text fields, press "Register", then "OK", and re-run the tests.

Run the simulation by pressing the RUN button under Simulation section of the CHARGE tab icon_run_charge_new_zoom93.  After the simulation is run, results will be available in the CHARGE solver region and the icon will change to icon_CHARGE_solver_region_result.  Right click on the object and click 'Visualize' to plot the quantities of interest.

 

Results and Discussion

Built in voltage and junction width are two parameters that can be quickly extracted from the simulation results. These values for an ideal junction can also be calculated analytically (using the equation on the top-level page).  We can then compare and confirm the agreement between theory and simulation.

 

The bias assigned to the contacts can be set by editing the boundary condition properties for base or emitter under the Boundary Condition Group in the objects tree.  The setting under the General tab of the boundary condition edit window can be modified to contain the start and stop voltage sweep values as well as the number of steps to sweep over.  Since junction width and the built in voltage are both properties of the zero-bias pn junction at thermal equilibrium, we will use a single steady-state voltage value of zero for both contacts. To do so, make sure for both base and emitter contacts, under the General tab, the bc mode is set to 'steady state' and and sweep type is chosen as 'single' with a value of 0 V. You might need to switch back to layout mode in order to change these settings. This can be done by clicking the 'Layout' button under the Simulation section of the CHARGE tab .

 

Bandstructure

Click the 'Run' button icon_run_charge_new_zoom85 so the simulation is run for zero bias.  Right click on the CHARGE object and click "Visualize > bandstructure".  The visualizer window will open and show the conduction and valence bands of the silicon substrate (along with the Fermi levels).

To make your plot look like the one shown here, click the "show/hide chart setting" icon_edit_plot button and open up the plot editor.  Select "Surface" option under "Plot type" and the "square" option under the "Axis scale options".  This will create a surface plot while changing the aspect ratio so that the x and z span are similar.  The Attributes list below the plot contains the list of results that can be viewed.  For example, the plot below shows the Ei attribute selected which plots the intrinsic Fermi level of the silicon substrate.

 

Surface plot of the intrinsic Fermi level

Surface plot of the intrinsic Fermi level

 

Built in Voltage

The built in voltage, Vbi,  is the difference between the two energy levels in the n- and p-type materials. This built in potential exists in the absence of any external voltage applied and no current is generated as a result of this potential.This value is in units of eV.

Type the following lines of script into the script prompt:

 

 

Ei=getdata("CHARGE", "bandstructure","Ei");

Vbi=max(Ei)-min(Ei);

?"Built in Voltage is " +num2str(Vbi)+ " eV";

 

 

The first line extracts the intrinsic energy level as a function of position, the second line calculates the difference between the maximum and minimum values, and the third line prints out the value of this difference corresponding to the built in voltage in units of eV.

 

Analytically, we have :

 

 

From the simulation setup,

 

 

Substituting these values into the above equation, using kT/q = 0.025860 eV, the theoretical value of the built in voltage is calculated to be approximately 0.709 eV, in close agreement with the simulated result.

 

Junction Width

Open and run the script file pn_diode.lsf.  The script extracts the conduction band from the "band" monitor.  The junction width can then be extracted from the range in the z direction over which this energy level is changing until it reaches a constant value deeper into the n- or p-type material.  From the analytic equation for the junction width, described in the previous section, we can conclude that when one dopant dominates, the majority of the space-charge layer is distributed where the lowest dopant concentration exists. In this example, NA >> ND, and the expression simplifies to

 

 

In the example simulation,

 

 

Substituting these values into the above equation, W = 0.96 μm.  The actual space-charge layer extends slightly beyond 1 μm due to the inaccuracy of the full depletion approximation:  there are carriers – electrons and holes in the space-charge layer, and their populations are significant at the edges of this region, compensating the ionized dopant charge and extending the width of the space-charge layer.  The script therefore returns a junction width value of ~1.1 μm where the width is measured from where the energy level reaches 99% of the maximum value to where the energy level reaches 99% of the minimum energy value.

 

Right click on the bandstructure monitor and select Visualize to view the 1D bandstructure along Z axis.  Delete all attributes except Ec from the attribute list and modify the X-axis limit as shown on the figure to the right to get a better view of the conduction band in the space charge region.

 

Line plot of the conduction band showing the depletion width and the built-in potential

Line plot of the conduction band showing the depletion width and the built-in potential

 

Current-Voltage Relationship

Switch back to layout mode by clicking on the Layout button icon_switch_device. Select the "steady state" option for bc mode in the emitter contact (boundary condition).  Select the sweep type to be range and and modify the values to sweep from 0.05 to 0.5 Volts in 5 steps.  Run the simulation.  After the simulation is complete, right click on the CHARGE object and click 'Visualize,' then choose 'emitter.'  The visualizer window for the current-voltage plots will open.  The "I" attribute is what we are interested in.  Remove all the other attributes from the list by selecting them and then using the "Remove" button.  Click on the 'show/hide chart settings' button icon_edit_plot at the top of the plot window to customize the plot.  Select the option to apply a "log 10y" scaling to the result.  Modify the x and y labels.  The plot of current versus voltage will look like the figure below.

 

Log plot of the forward bias current of the ideal diode

Log plot of the forward bias current of the ideal diode

 

When the emitter bias is positive, the diode is in forward bias mode and the current is increasing exponentially with the forward bias voltage:

 

 

where η is an ideality factor ranging from 1 (ideal) to 2 (non-ideal). Taking the log of this expression indicates that the slope of the log-scaled plot should be constant,

 

 

 

Junction Capacitance

Another figure of merit of interest is the junction capacitance when the diode is in reverse bias. Open and run the script pn_diode_capacitance.lsf. The script sets the bias to range from -0.2 to -4 volts in 10 steps (at the emitter).  The capacitance can easily be obtained by calculating the differential charge and dividing it by the voltage change.  It will read the total charge recorded in the charge monitor and calculates the variation as a function of bias voltage.  The junction capacitance based on electrons as well as based on holes is calculated.  Using the simplified expression on the introduction page for this example, the theoretical capacitance, Cj, is also calculated and plotted on the same graph.  We can see that the values are in agreement.

 

Junction capacitance of the pn junction under reverse bias

Junction capacitance of the pn junction under reverse bias

 

Recombination effects

In setting up the simulation, we disabled bulk recombination and generation to mimic the behavior of an ideal pn-junction diode.  In reality, these phenomena affect the carrier distribution and current-voltage relationship in the device.  Switch back to layout mode by clicking on the Layout button icon_switch_DEVICE.  Click on the materials in the Objects Tree to modify the properties of the silicon material used in the simulation. This can be done by expanding the Si object and right-clicking on Si (Silicon) object (which contains electronic properties of Si) and selecting edit material properties.

 

Enable impurity scattering effect on mobility

In the "Mobility" tab under "Electronic Properties", pick the 'Masetti' model for the "Impurity" scattering of carries.

 

Enable impurity scattering model for mobility

Enable impurity scattering model for mobility

 

Enable bulk recombination

In the 'Recombination' tab, enable the trap-assisted (Shockley-Read-Hall) and Auger recombination models.  Define the electron and hole carrier lifetimes for the trap-assisted recombination model as shown below.    For the Auger recombination model, define the carrier (electron/hole) capture coefficients as shown below.

 

Enable trap-assisted (SRH) recombination

Enable trap-assisted (SRH) recombination

Enable Auger recombination

Enable Auger recombination

 

Enable surface recombination

On the Boundary Conditions section of the CHARGE tab toolbar, click on the surface recombination button icon_surface_recombination_new_zoom75 to add a surface recombination boundary condition and select the added object under the boundary condition group in the object tree.  Then click on icon_edit button (on top of the Objects Tree) to edit surface recombination properties according to the following table

Define surface recombination velocities at a surface recombination boundary condition

Define surface recombination velocities at a surface recombination boundary condition

Add a material interface in the surface recombination boundary condition

Add a material interface in the surface recombination boundary condition

 

Edit the emitter contact voltage, select the sweep range type, and set the bias range from 0.05 to 0.8 volts with a step size of 0.05 V.  Run the simulation again to look at the current-voltage relationship.  After the simulation is run, right click on the 'CHARGE' object and visualize the emitter results.  Notice that with the recombination effects taken into account, the current-voltage plot (shown here on log scale) does not increase at a constant rate anymore, and exhibits three distinct regions.

 

Log plot of forward bias current of a real diode

Log plot of forward bias current of a real diode

 

You can also set the voltage to a negative value to look at the reverse bias voltage current characteristic. You will notice that now the reverse biased diode current does not reach a constant saturation value, rather the leakage current increases with voltage, which is indicative of recombination effects.  In reverse bias, the space charge layer becomes wider as the electric field increases. This effect depletes the region of carriers (hence the alternative name "depletion layer"), such that the product np << ni2.  The model for the trap-assisted recombination rate is given by the Shokley-Read-Hall (SRH) formula,

 

 

which reduces to

 

 

in the space charge layer (where n << n1, p << p1, and n1 = p1 = ni).  The negative sign indicates that carriers are now being generated by this process.  These generated carriers are swept by the electric field in the space charge layer to the adjacent n- or p-type region, where they contribute to the current.

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